1. Field of the Invention
The present invention relates to a semiconductor integrated circuit that has an internal circuit including transistors and a bias circuit for supplying a constant current to the internal circuit.
2. Description of the Related Art
FIG. 1 shows an example of a bias circuit in a prior art.
A bias circuit 100 has a band-gap reference BGR that generates a reference voltage V0, an amplifier AMP that receives the reference voltage V0, and a voltage generating unit VGEN that receives an output voltage of the amplifier AMP to generate predetermined voltages at nodes ND100, ND200. The voltage generating unit VGEN has a pMOS transistor PM100, an nMOS transistor NM100, and a resistor R100 that are connected in series between a power supply line VDD and a ground line VSS. The nMOS transistor NM100 receives the output voltage of the amplifier AMP at a gate thereof.
The node ND100 connected to a drain of the pMOS transistor PM100 is connected to gates of pMOS transistors PM200 (PM210, PM220, . . . ) constituting a constant-current source 200. The pMOS transistor PM100 in the bias circuit 100 and the pMOS transistors PM200 in the constant-current source 200 constitute current mirror circuits respectively. Drains of the pMOS transistors PM200 (PM210, MP220, . . . ) are connected to power supply lines of internal circuits 300 (300a, 300b, . . . )
In the bias circuit 100 described above, the band-gap reference BGR stably outputs a silicon band-gap voltage (approximately 1.2 V), independently of temperature variation and a threshold voltage of a transistor constituting the band-gap reference BGR. Therefore, a bias circuit of this type is capable of generating a constant current I10 without being influenced by temperature variation or the variation of conditions of a semiconductor integrated circuit fabrication process (for example, FIG. 1 in Japanese Unexamined Patent Application Publication No. Hei 5-183356).
FIG. 2 shows the operation of the internal circuits 300 connected to the bias circuit 100 shown in FIG. 1
Generally, current consumption of a transistor increases when the threshold voltage of the transistor becomes lower due to the change of process conditions and so on in a semiconductor integrated circuit fabrication process. Accordingly, the operating speed of the internal circuits 300 becomes faster. The operating speed of the internal circuits 300 becomes slower when the threshold voltage of a transistor becomes higher. Further, the current consumption of a transistor has temperature dependency. Accordingly, the operating speed of the internal circuits 300 changes also when the ambient temperature of the semiconductor integrated circuit varies.
The product specification (timing specification, current specification, and so on) of a semiconductor integrated circuit is determined in consideration of the aforesaid variation of the threshold voltage and temperature variation. Therefore, the timing specification, for example, of operating frequency or the like is determined according to the maximum value and the minimum value of the threshold voltage and-the maximum value and the minimum value of the temperature ((a) and (b) in FIG. 2).
FIG. 3 shows the distribution of the threshold voltage of a specific transistor for each semiconductor integrated circuit chip.
The threshold voltage of the transistors varies due to the variation of the process conditions (manufacturing lot) and so on. Therefore, the dispersion of the threshold voltage among manufactured semiconductor integrated circuit chips presents arc-formed distribution having its peak at the center, as shown in the drawing.
In the aforesaid semiconductor integrated circuit in the prior art, when the threshold voltage is in a lower range, the operating frequency does not satisfy the maximum rating in the product specification, resulting in a defective die. On the other hand, when the threshold voltage is in a higher range, the operating frequency does not satisfy the minimum rating in the product specification. As a result, a range satisfying the specification is narrowed, which lowers the yield that is the ratio of the number of good dies, resulting in product cost increase.